2009, English, Article edition: Synthesizing Hardware from Dataflow Programs Janneck, Jörn W.; Miller, Ian D.; Parlour, David B.; ...

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Bookmark: http://trove.nla.gov.au/version/204694
Physical Description
  • text
Published
  • HAL - CCSD
  • 2009
Language
  • English

Edition details

Title
  • Synthesizing Hardware from Dataflow Programs
Author
  • Janneck, Jörn W.
  • Miller, Ian D.
  • Parlour, David B.
  • Roquier, Ghislain
  • Wipliez, Matthieu
  • Raulet, Mickaël
Published
  • HAL - CCSD
  • 2009
Physical Description
  • text
Subjects
Notes
  • The MPEG Reconfigurable Video Coding working group is developing a new library-based process for building the reference codecs of future MPEG standards, which is based on dataflow and uses an actor language called Cal. The paper presents a code generator producing RTL targeting FPGAs for Cal, outlines its structure, and demonstrates its performance on an MPEG-4 Simple Profile decoder. The resulting implementation is smaller and faster than a comparable RTL reference design, and the second half of the paper discusses some of the reasons for this counter-intuitive result.
  • HAL:hal-00407947, version 1
  • HAL:http:/​/​hal.archives-ouvertes.fr/​hal-00407947/​en/​
  • DOI:10.1007/​s11265-009-0397-5
Language
  • English
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